My microcode decoder design

doug
Thu, 09 Jul 2009 14:54:59 +0000

Months ago I was required to design and model some part of computer system architecture. I decided to do a very small microcode processor.

For those who are unfamiliar with microcode allow me to explain the significance. In computer system design there are two approaches to designing instruction decoders. The first is called the hardwired approach. For each possible instruction in our instruction set the decoder designers spend a lot of time with truth tables. Each bit in the instruction is mapped through logic pathways to produce an appropriate result on the processor control lines. This is a very efficient decoding approach as instructions are decoded extremely fast. The problem is that if you change the instruction set or even modify the components in the processor, the decoder will need a complete overhaul. This becomes expensive.

The second approach is called microcoding. Here we design a dynamic instruction set that can be reprogrammed (called microprogramming believe it or not). The idea is that we store the entire instruction set and the values of each control line in a very small very fast memory device. When an instruction enters the decoder, the decoder simply looks up the values of the control lines for the input instruction and writes them out onto the bus. This is not as fast as a hardwired approach because memory devices have much greater latency than logic gates however it makes changing the instruction set (adding, removing or modifying instructions) very easy. We don't have to spend a lot of time completely redesigning the decoder whenever we add, remove or modify other components in our system. We simply reconfigure the decoder to behave differently when it receives an instruction.

This improved flexibility makes re-engineering computer systems fairly inexpensive and fast.

Typically a microcode "map" (the memory device that maps instruction to control lines values) is a linear strip of memory where the addresses are the instructions and the data contained in each addressable word is the control line output. This means that a decoder can set [i]n[/i] control lines where [i]n[/i] is the word size of the system. You can double [i]n[/i] by coupling multiple memory devices together, allowing you to control an unlimited number of control lines per instruction.

Here is the microcode decoder I designed as a wiring schematic using industry standard components.

For a documented overview of the design please see neverfear_org_microcode_decoder.pdf